ITHEA Classification Structure > B. Hardware > B.6 LOGIC DESIGN > B.6.3 Design Aids
ITHEA Classification Structure > B. Hardware > B.7 INTEGRATED CIRCUITS > B.7.2 Design Aids
OPTIMIZING PROGRAMMABLE LOGIC ARRAYS USING THE SIMULATED ANNEALING ALGORITHM
By: Liudmila Cheremisinova, Irina Loginova (3308 reads)
Rating:
(1.00/10)
article:
SCALAR CHOICE CRITERIA'S USAGE FOR DETERMINATION OF THE OPTIMUM SWITCHING ...
· SOME ASPECTS OF CHOICE OF SWITCHING SCHEME FOR CONSTRUCTION OF OPTICAL ...
· Program Invariants Generation over Polynomial Ring using Iterative Methods.
· OPTIMIZING PROGRAMMABLE LOGIC ARRAYS USING THE SIMULATED ANNEALING ALGORITHM
· SIMPLE CONSTRAINED FOLDING OF PROGRAMMABLE LOGIC ARRAYS OF SPECIAL TYPE
· MULTIPLE FOLDING OF VLSI REGULAR STRUCTURE VIA BOOLEAN SATISFIABILITY
·
|
Login World Clock |